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S1 ECG Kit


A powerful analog frontend combined with the S1 Module makes this an all-in-one kit to deploy and test algorithms with ease. Be that for learning, research, or as the starting point for your next product.

Silicon Witchery S1 ECG Reference Kit


  • Learning and teaching around heart health
  • Researching ML based ECG algorithms
  • Wireless data logging
  • New product development


  1. S1 Module
  2. Block Diagram
  3. ECG Frontend
  4. Built-in Battery
  5. LEDs & IO
  6. Programming
  7. Building the Code
  8. Schematic
  9. Design Files & Source Code
  10. Bugs & Improvements
  11. Suitability for Critical Applications
  12. Licence

S1 Module

The built-in S1 Module is designed for IoT projects where performance is key, yet space and power constraints cannot be compromised.

It features a clever combination of four ICs.

  • A Bluetooth 5.2 SoC
  • An FPGA designed for low power AI/ML
  • A complete battery management IC
  • And 32Mb of flash memory

Additionally, the module breaks out high speed IO and several adjustable power rails so that your design can remain compact.

To read more about the S1 Module, be sure to check out the full datasheet here.

Block Diagram

The block diagram below shows the simplistic nature of devices built with the S1 Module.

This design features a single ECG frontend amplifier as the only active external component in the system. All other processing is done within the S1 Module.

S1 ECG kit system block diagram

ECG Frontend

The ECG frontend is based on the Analog Devices AD8233. It contains the low noise signal conditioning for amplifying ECG signals along with leads-off detection to allow for auto-sleep when the probes are not in contact with the skin. Applications targeted for low power can therefore be designed using the board.

The S1 ECG kit makes full use of the device by exposing all three probes (two on the front, and one on the back) which come into contact with the user when they hold the board with both hands.

Built-in Battery

For ease of portability, as well as low noise measurements. The board features a 150mAh lithium polymer battery mounted on the back of the device. The battery charges automatically when a USB-C power adaptor is connected.

Thanks to the auto-sleep feature, there is no need for any power switch, and the device can retain its charge for weeks in standby.

A 0.1” jumper and pin header is exposed on the back of the board for measuring the battery current (both in charging and discharging) during development.

Note that the high gain nature of the ECG amplifier is very sensitive to external noise sources and ground loops which may be created when using external power. For accuracy, especially if using the device for data logging, it’s recommended to run the device from the internal battery without external power being connected.

Battery safety: The S1 ECG Kit standard firmware comes with the appropriate settings configured for safely charging the included lithium battery. These settings should be changed with care as higher charge currents and voltages can be set which may damage the battery and risk fire. If in doubt, the current sense jumper should be removed which will fully disconnect the battery from the S1 charge circuit.


Seven LEDs on the front of the board display a smooth waveform of the measured ECG pattern. These LEDs can be used for visualization and debugging purposes, while high frequency data can be streamed over Bluetooth to a mobile device.

If required, up to four of the LED pins (D1 - D4) can be repurposed as GPIO lines via the solder points on the back of the PCB. This allows you to add additional sensors or peripherals to develop your application.

Back side IO connections of the S1 ECG Kit

Additionally, the raw ECG analog output is also exposed for ease of testing.


To program the S1 ECG Kit, you will need a J-Link enabled debugger as well as a Tag Connect 6pin ARM debug cable. It is also possible to use the Nordic nRF52 development kit as a programmer via the port labeled Debug out on the corner of the board.

For educational purposes, the J-Link EDU mini is also a great option that is low cost and small.

Building the Code

The base firmware is designed to be minimal and easily highly expandable as a perfect starting point for new designs.

The operation is largely documented within the source code.

To get started, begin by cloning the repository.

git clone --recurse-submodules
cd s1-ecg-demo

If you haven’t already, set up these tools in order to build the project.

You should then be able to run make. Be sure to include the path to your NRF SDK folder.

make -C firmware build-verilog NRF_SDK_PATH=${HOME}/nRF5_SDK
make -C firmware flash NRF_SDK_PATH=${HOME}/nRF5_SDK

The first make command will build the Verilog project, and convert the binary file into a header file. The nRF application transfers this binary to the FPGA after boot up. In your application, you could download this binary dynamically over Bluetooth rather than storing it within the flash of the nRF chip.

The second make command builds the nRF code, and flashes the module using the J-Link debugger.

Once you’re up and running, you can begin customizing the application to your needs. Be sure to check out the full S1 Datasheet to learn more about the module, as well as its features.


The complete schematic for the S1 ECG Kit is shown below. A PDF version is available here.

S1 ECG kit schematic

Design Files & Source Code

All source files for the hardware and firmware can be found within the S1 ECG Kit repository.

The PCB design is produced in KiCad v5.1 which is free and open source.

Bugs & Improvements

If you have any questions, or if something is unclear, feel free to create an issue and we’ll try our best to improve it.

Suitability for Critical Applications

The S1 ECG Kit is intended for development, and is not verified for real medical use where performance and accuracy would be critical to human health or well-being.

Additionally, it has not been designed according to any standards in order to guarantee performance or accuracy. No responsibility is assumed by Silicon Witchery for its use.


Copyright 2022 © Silicon Witchery.

This design is licenced under: CERN Open Hardware Licence Version 2 - Permissive.